EEVblog #1247 - DDR Memory PCB Propagation Delay & Layout

Comments · 300

• ST

  @steverobbins4872 · 7 years ago · pinned

  Another good tip for routing high speed signals is keep each trace on one layer from start to end; don't let it jump between layers, as you normally would do for low speed signals.  Here is why.  Suppose you are routing a signal with microstrip (that means the signal trace is on an outer layer, and the layer just beneath it is it's reference plane, usually ground).  The current in the trace will return on the reference plane just beneath the trace.  If you could see the return current in the plane, it would look like the shadow of the trace.  Now suppose you jump the signal to an inner routing layer that is between two planes; this is now stripline, and it has two reference planes (usually one is ground and the other will be a power plane).  So how does the return current follow the trace?  If all the planes are the same potential (e.g. all grounds) then the return current will find it's way through the nearest via that connects the planes together.  But if the plane vias are far from the trace via, you get a big loop, which looks inductive, and will cause a nasty reflection.  So, if you absolutely must have your trace change reference planes (which is very common if it goes through a connector) make sure there are plane vias very close to the signal via.  And if you are changing reference planes (from say, ground to 3.3V) then you must put a decoupling cap very close to the signal via, that couples the reference planes together.

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• EN

  @entritur · 7 years ago

  Yes! I want an in-depth guide to timing. It's frustrating me right now

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• AK

  @akuaku77 · 7 years ago

  What I learned today: "You wouldn't want to go wigglety pigglety"

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• TE

  @testep02 · 7 years ago

  As a software engineer with no formal hardware training, this very topic nearly caused me to quit doing electronics as a hobby. But then I did what you suggested and tossed out all the garbage I found online and started with some basic rules of thumb. I was over the moon when I printed my first USB3 hub board and it worked! Since then I have laid out some single-board Linux boards with ARM chips that use DDR memory and have had great success. My first couple of attempts failed, but then I took the courses on the FedEvel website and my next attempt was a success. There's a lot to learn on this topic, but if you just use some common sense and some good rules of thumb, and use your layout tools to your advantage, you can lay these PCBs out in no time.

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• ME

  @Mehrunes86 · 7 years ago

  All these 180° bends, must be an absolut nightmare for the busdriver.😂

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• RU

  @russgibson7376 · 7 years ago

  Back in the day ... :-) I worked with an engineer that needed to delay an NMI signal to be slightly after the rising edge.  He used what he called "Mickey Mouse Logic", placing 4 unused inverters in series between the source and target.  It worked flawlessly at 1 Mhz.  It was a bit eye opening for me at the time (I was like 19 or so), and has stuck with me ever since (this was in late 80's or early 90's).

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• ZO

  @zoeyk.6338 · 7 years ago

  I'd love something on timing diagrams Dave!

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• LO

  @LorneChrones · 7 years ago (edited)

  Another tip that I&apos;ve picked up in the last year (still a young player mind you), is to take into account soldermask when routing on external layers. Rule of thumb I was taught for most soldermask is it&apos;ll reduce your Zo of the controlled impedance trace by roughly 1Ω per 1mil thickness of soldermask.<br><br>Another tip I&apos;ve learned is if you do have to route DDR (or really any HS such as USB or QSPI SD), route your traces/lanes as perpendicular as possible to adjacent traces on adjacent layers (Shield with ground planes as much as possible). That way coupling will be reduced or nullified because right hand rule.<br><br>Last big piece is that it&apos;s not the frequency that matters, its the edge (rise/fall) rate of the signal that matters. If you slow down or slew/rate control your signal (while still meeting setup/hold times) you can minimize EMI and even help mitigate against reflections.

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• TI

  @timurvotyakov7821 · 7 years ago

  video about &nbsp;how to read a timing diagrams is a great idea.

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• AR

  @ariedemuijnck · 7 years ago (edited)

  At <a href="https://www.youtube.com/watch?v=4VTtkF5fzMM&amp;t=2140">35:40</a> - A common mistake, to match a differential pair with a squiggle &apos;somewhere&apos; in one of the two signals. THAT SHOULD NEVER BE JUST SOMEWHERE &nbsp;IN THE MIDDLE. The pair is meant to be fully differential, and creating a length jump this way is like a phase jump. This means that at least on one side of the squiggle the pair is not balanced. The skew correction in a pair MUST be near the cause of the skew, e.g. the sideways leaving of a BGA pin pair.

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• BU

  @bukitoo8302 · 7 years ago

  Thanks for share the CIAA project!

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• LE

  @lemon3rd800 · 7 years ago

  <a href="https://www.youtube.com/watch?v=4VTtkF5fzMM&amp;t=1458">24:18</a> Aussie kickin&apos; in

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