ECE3400 L43: JFET Bias Equation and Self Biasing (Analog Electronics, Georgia Tech course)

Comments · 10

• NI

  @NinerFourWhiskey · 1 year ago

  There is a very cool patent by Sondermeyer (of Peavey) for the "transtube" line. He goes into the use of Darlington pairs of NPN transistors to get around the variability of pinch-off voltages of JFETs. (see mid 1990's Transtube special schematic). I breadboarded a single darlington stage of the preamp. Works amazingly well actually. I think I worked out the math, but EE school was almost 40 years ago. LOL.

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• JO

  @joerectifier · 1 year ago

  Man, Aaron,  wish I had taken my undergraduate EE courses with you as an electronics professor. We had a poor electronics text and focused waay too much in theory rather than application. I did build a solid state guitar amplifier, but I would have loved this coursework. Oh well. Anyway this is great stuff and very very interesting.

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• RE

  @redshift4 · 10 months ago

  JFETs are so underrated.<br>I found a very interesting application for them. I&apos;ve found it in a hungarian HAM radio magazine and the guy basically made a FETRON out of a mosfet&amp;jfet cascode to make a pentode tube substitute.<br>Basically the grid is the gate of the jfet, the screen is the gate of the mosfet &quot;above&quot; and cathode anode are the mosfet drain and the jfet source.<br>You bias the mosfet gate with a resistor divider and a capacitor to ground to bias it normally on. It behaves as a source follower so after Vgs drop from the creen voltage the jfet Vds cannot be over the breakdown voltage. For example 30 volt mos gate - Vgs drop of 5 volt is 25. <br><br>Anyways, it&apos;s so cool. Square law characteristic and can handle tube voltages. It can only conduct Idss max current but jfets can be paralleled pretty easily or a current mirror can be used (or multiple ones stacked), at which point you can have a full power tube in the solid state glory!<br>Well... as long as all the biasing is done correctly to match the tube gain curves.

• RE

  @reverend11-dmeow89 · 1 year ago

  <a href="https://www.youtube.com/watch?v=GxPoskAX8AA&amp;t=236">3:56</a> &quot;So...&quot; &nbsp;okay, all right, now i gotta follow this <a href="https://www.youtube.com/watch?v=GxPoskAX8AA&amp;t=249">4:09</a> &quot;..ridda this here. &nbsp;OKay...&quot; &nbsp;m&apos;kay... &nbsp;<br><br>weird<br><br>twelve seconds ago, &quot;FLASH! &nbsp;Shazzam I GOT DIS&quot;<br><br>replay to stick time-stamps inna right place for this comment that intended quite the opopsite<br><br>]&quot;Where&apos;d it go? {my total GROK&quot; &nbsp; ;-)

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• JO

  @johnsuede · 1 year ago

  If you don’t slow down, I will continue to bias my jfets using a variable resistor until my distortion circuit sounds good….its been decades since I did these types of equations at university!😊

  1

• SC

  @scottsackrider475 · 1 year ago

  Still digging those videos! &nbsp;But after doing electronics for years, I&apos;d like to delve deeper into the math behind it all. &nbsp;Do you have a recommendation for a simple reference of the laws and equations? Such as KVL.

• AN

  @AnalogDude_ · 1 year ago

  Hey professor, i recently saw a non inverting opamp but the gnd connection goes via a capacitor and afterwards on youtube a video about a circuit with that this as well. What&apos;s up with that?

• AK

  @akosbbop · 1 year ago

  Hi Aaron, just one note about your note about arrow inside the circuit symbol, that symbolizes a pn junction. I think this is not true, since when you you bias a JFET, the p and n junctions are reverse biased, and the parasitic input bias current that flows into the source from the gate is actually analogous to the reverse biased current of an ordenary silicon diode. If it was the representation of a pn junction, in the case of an N-channel JFET, it should point out, right? Did I miss anything?